Verification of Magnitude and Phase Responses in Fixed-Point Digital Filters

In the digital signal processing (DSP) area, one of the most important tasks is digital filter design. Currently, this procedure is performed with the aid of computational tools, which generally assume filter coefficients represented with floating-point arithmetic. Nonetheless, during the implementation phase, which is often done in digital signal processors or field programmable gate arrays, the representation of the obtained coefficients can be carried out through integer or fixed-point arithmetic, which often results in unexpected behavior or even unstable filters. The present work addresses this issue and proposes a verification methodology based on the digital-system verifier (DSVerifier), with the goal of checking fixed-point digital filters w.r.t. implementation aspects. In particular, DSVerifier checks whether the number of bits used in coefficient representation will result in a filter with the same features specified during the design phase. Experimental results show that errors regarding frequency response and overflow are likely to be identified with the proposed methodology, which thus improves overall system's reliability

OptCE: A Counterexample-Guided Inductive Optimization Solver

This paper presents optimization through counterexamples (OptCE), which is a verification tool developed for optimizing target functions. In particular, OptCE employs bounded model checking techniques based on boolean satisfiability and satisfiability modulo theories, which are able to obtain global minima of convex and non-convex functions. OptCE is implemented in C/C++, performs all optimization steps automatically, and iteratively analyzes counterexamples, in order to inductively achieve global optimization based on a verification oracle. Experimental results show that OptCE can effectively find optimal solutions for all evaluated benchmarks, while traditional techniques are usually trapped by local minima

Direct Form Digital Robust RST Control Based on Chebyshev Sphere Optimization Applied in a DC-DC Power Converter

This paper presents a novel direct form to design a digital robust control using RST structure (i.e., name given because of the R, S and T polynomials computed) based on convex optimization such as Chebyshev sphere; this approach was applied to a DC-DC Buck converter. This methodology takes into account parametric uncertainties and a Chebyshev sphere constraint in order to ensure robust performance and stability of the system in the discrete domain. For this purpose, a mathematical model for the DC-DC Buck converter is presented when considering uncertainties in electrical variables, such as load resistance, inductance, capacitance, and source voltage variation, also to obtain the discrete model of the system by using the bilinear transformation. The proposed methodology is compared with two other approaches designed in a discrete domain: the classical pole placement and the robust methodology based on the Kharitonov theorem. Wide-ranging experiments are performed in order to evaluate the behavior of the control methodologies when the system is subject to parametric variations of the load resistance and voltage setpoint variation. The results show that the proposed methodology outperforms the other approaches in 90% of the tests and ensures robust stability and robust performance when the system is subjected to a parametric uncertainties family